Meter 架构框架图 v0.2

flowchart TD Start([用户进入 XiLink Stage]) --> LeftDock[左侧 Dock] LeftDock --> ConnDock[🔌 连接 Dock
底层 DSP 通信] LeftDock --> ResMon[📊 资源监控 Dock
★ 原右侧 指标监控 迁移过来] ConnDock --> ConnChoice{选择连接类型} ConnChoice -->|★新增 native| NativeMode[CPU 模式分支] ConnChoice -->|DSP hardware| DspMode[DSP 硬件模式分支] ConnChoice -->|simulator| SimMode[PC Simulator 分支] NativeMode --> NativeSubChoice{native 子模式} NativeSubChoice -->|纯 CPU| PureCpu[source 走 CPU 合成] NativeSubChoice -->|VDSP 虚拟 DSP| Vdsp[source 走 DSP 算法栈] PureCpu --> ResTargetCpu[资源监控 target 池
CPU0 / CPU1 / CPU2 / CPU3] Vdsp --> ResTargetVdsp[资源监控 target 池
VDSP0 / VDSP1 / VDSP2 / VDSP3] DspMode --> ResTargetDsp[资源监控 target 池
真实 DSP 硬件 core] SimMode --> ResTargetSim[资源监控 target 池
simulator slot] ResTargetCpu --> EngineLoad[AudioEngineService
RuntimeKind.PcNative] ResTargetVdsp --> EngineLoad ResTargetDsp --> EngineLoad2[AudioEngineService
RuntimeKind.DspHardware] ResTargetSim --> EngineLoad3[AudioEngineService
RuntimeKind.PcSimulator] EngineLoad --> ChainReady([链路加载完成
进入 Meter 双链路]) EngineLoad2 --> ChainReady EngineLoad3 --> ChainReady ResMon -.读取.-> ResTargetCpu ResMon -.读取.-> ResTargetVdsp ResMon -.读取.-> ResTargetDsp style NativeMode fill:#e1f5e1 style Vdsp fill:#fff4cc style ResMon fill:#ffe1e1 style ConnChoice fill:#cce5ff

flowchart LR subgraph UI[前端 UI 层] ChainCanvas[XiLink 链路画布
用户拖拽 meter module] RightDock[右侧 Dock
4 类可观察节点] MeterDocks["★ Meter Dock 集合
FFT/RMS/Phase/Scope/Transfer
含 log_module 追踪器"] Popup[弹窗 Popup
FFT/Phase/Transfer/RMS/Scope] end subgraph Chain1["🔴 链路 1 · dspalgo C 实时探针"] FanOut[fan-out tap
1in 1out passthrough] AnalysisMod[analysis modules
fft/rms/phase/scope/transfer
typeId 0x100E0001~5] Polling[Polling API
dspalgo_dll.h:442] WsRoute[RealtimeWsRoutes.cs
WebSocket] end subgraph Chain2["🟢 链路 2 · pysidecar Python 离线/准实时"] PcmFork[Backend PCM Fork
SourceSignalService.cs] WavFile["WAV 文件落地
output/*.wav
(log_module 输出)"] WasapiCap[WASAPI 直采
设备级] Sidecar[pysidecar/main.py
FastAPI · numpy/scipy] HttpRoute[HTTP REST
30+ endpoints] end ChainCanvas -->|用户拖 meter module 到链路中| FanOut FanOut --> AnalysisMod --> Polling --> WsRoute WsRoute --> ChainCanvas WsRoute --> MeterDocks RightDock -->|节点 1: source · 仅 PC 模式| PcmFork RightDock -->|节点 2: sink · 仅 PC 模式| PcmFork RightDock -->|节点 3: 输入设备| WasapiCap RightDock -->|节点 4: 输出设备| WasapiCap MeterDocks -->|追踪链路中所有 log_module 实例
选某个 → 读其 wav 做对应分析| WavFile PcmFork --> Sidecar WavFile --> Sidecar WasapiCap --> Sidecar Sidecar --> HttpRoute HttpRoute --> Popup HttpRoute --> RightDock HttpRoute --> MeterDocks style Chain1 fill:#ffe1e1 style Chain2 fill:#e1f5e1 style FanOut fill:#ffcccc style Sidecar fill:#ccffcc style MeterDocks fill:#fff4cc

flowchart LR subgraph XitestUI["XiTest 实时模式 UI"] DeviceView[设备主界面
WASAPI 输入/输出] SourceView[source 主界面
注入信号波形/频谱] SinkView[sink 主界面
采集结果验证] XitestMeters["xitest meter 组件
RMSMeter / SpectrumChart
PhaseChart / WaveformChart
FreqResponseChart"] end subgraph Chain2["🟢 链路 2 · pysidecar(主路径)"] WasapiCap2[WASAPI 直采] PcmFork2[Backend PCM Fork] WavFile2[wav 落地] Sidecar2[pysidecar 分析] HttpRoute2[HTTP REST] end subgraph Chain1Limited["🔴 链路 1 · 仅当链路中插了 meter module"] Tap[fan-out tap
少数场景] WsLimited[WS frame stream] end DeviceView --> WasapiCap2 SourceView --> PcmFork2 SinkView --> PcmFork2 XitestMeters -.可选追踪 log_module.-> WavFile2 WasapiCap2 --> Sidecar2 PcmFork2 --> Sidecar2 WavFile2 --> Sidecar2 Sidecar2 --> HttpRoute2 HttpRoute2 --> XitestMeters HttpRoute2 --> DeviceView HttpRoute2 --> SourceView HttpRoute2 --> SinkView XitestMeters -.少数实时探针场景.-> Tap Tap --> WsLimited WsLimited --> XitestMeters style Chain2 fill:#e1f5e1 style Chain1Limited fill:#fff4cc style XitestMeters fill:#bbdefb

flowchart LR subgraph Xitune["XiTune Stage"] TuneUI[调音 UI
目标曲线 + 测量曲线] TuneMeters["meter 组件
★ 与 XiLink 复用"] TuneAuto[auto_tune 模块
target_loader / deviation /
simulate / averaging / smoothing] end subgraph Shared["共享基础设施(与 XiLink 一致)"] Chain1Ref["链路 1 · dspalgo C 实时探针
(链路中 meter module)"] Chain2Ref["链路 2 · pysidecar
(右侧 Dock + log_module 追踪)"] end TuneUI --> Chain1Ref TuneUI --> Chain2Ref TuneMeters --> Chain1Ref TuneMeters --> Chain2Ref TuneAuto -->|HTTP /auto_tune/*| Chain2Ref style Xitune fill:#f3e5f5 style Shared fill:#e8f5e9

sequenceDiagram autonumber actor U as 用户 participant Canvas as XiLink Canvas participant Backend as backend_csharp participant DllInterop as DSPAlgoInterop participant Algo as dspalgo.dll
fft_module.c participant WS as RealtimeWs participant Dock as DrawerDockFft.vue U->>Canvas: 拖 fft_module 到链路中间 Canvas->>Backend: POST 链路重建(含 fft tap) Backend->>DllInterop: 加载 typeId 0x100E0002 DllInterop->>Algo: 实例化 fan-out tap Algo-->>DllInterop: handle 返回 Backend->>WS: 订阅 frame stream loop 实时(rate-limited) Algo->>Algo: 就地算 FFT(零拷贝) Backend->>Algo: poll FftFrame Algo-->>Backend: FftFrame{bins, peak, ts} Backend->>WS: push frame WS->>Dock: WebSocket frame Dock->>Dock: 渲染频谱(零数学) end

sequenceDiagram autonumber actor U as 用户 participant Right as 右侧 Dock participant Backend as backend_csharp
SourceSignalService participant Sidecar as pysidecar
analyzer/freq_response participant Popup as FftModulePopup.vue U->>Right: 右键 source 节点 → 看频谱 Right->>Right: 检查 RuntimeKind alt PcNative / PcSimulator Right->>Backend: GET /source/{id}/pcm-fork Backend-->>Right: PCM bytes(短窗) Right->>Sidecar: POST /analyze/fft (HTTP) Sidecar->>Sidecar: numpy/scipy FFT Sidecar-->>Right: FftAnalysisResult Right->>Popup: 展示频谱+峰值 else DspHardware Right->>U: ⚠️ source 节点不可观察(灰) end

sequenceDiagram autonumber actor U as 用户 participant Canvas as XiLink Canvas participant LogMod as log_module 实例 participant Dialog as 落盘类型选择 Dialog participant Backend as backend_csharp participant FS as 文件系统
output/ U->>Canvas: 双击链路上的 log_module Canvas->>Dialog: 弹出落盘配置对话框 Dialog->>U: 显示选项
☐ Audio Log (wav)
☐ Text Log (csv/json)
☐ 采样率/位深/通道选择
☐ 文件名模板 U->>Dialog: 勾选 + 确认 Dialog->>Backend: PUT /log-module/{id}/config Backend->>LogMod: 应用落盘配置 LogMod->>FS: 运行时落盘 wav / log Note over Dialog,U: ❌ 不展示频谱/RMS/相位等分析 UI
分析交给 Meter Dock 的追踪器

sequenceDiagram autonumber actor U as 用户 participant Dock as FFT Dock
(也可以是 RMS / Phase / ...) participant Backend as backend_csharp participant FS as output/*.wav participant Sidecar as pysidecar
analyzer/freq_response U->>Dock: 打开 FFT Dock Dock->>Backend: GET /chain/log-modules
列出当前链路所有 log_module 实例 Backend-->>Dock: [{id, name, file, sr, ch}, ...] Dock->>U: 显示下拉列表 U->>Dock: 选 log_module #2 Dock->>Sidecar: POST /analyze/fft?file=output/log_2.wav Sidecar->>FS: 读 wav Sidecar->>Sidecar: numpy FFT Sidecar-->>Dock: FftAnalysisResult Dock->>Dock: 渲染频谱 Note over Dock,Sidecar: 同 Dock 可在多个 log_module 间快速切换
RMS Dock / Phase Dock / Scope Dock / Transfer Dock 同理